In the front end of a radio receiver unit, a high frequency low noise amplifier is provided for amplifying a reception signal. For the above high frequency low noise amplifier, it is required to amplify the amplitude of a minute reception signal being input from a receiving antenna with the suppression of an increase of noise, and also to have predetermined impedance. The receiving antenna may receive an input signal having large power, other than a minute reception signal. Therefore, in order to attenuate such the input signal having large power, it is necessary to provide an attenuator in the amplifier.
Meanwhile, in recent years, it is proposed to configure a front-end circuit using a CMOS circuit, which is realized by a common chip to a circuit provided in a succeeding stage for digitally processing a baseband signal. By configuring both the front-end circuit and the digital processing circuit using CMOS circuits, it is possible to obtain a single chip configuration, enabling large cost reduction.
FIGS. 1 and 2 shows configurations of the conventional front-end circuits. In the example shown in FIG. 1, a variable attenuator 14 is provided between an antenna 10 and a high frequency low noise amplifier 16. In the succeeding stage of low noise amplifier 16, there is provided a mixer 18 to multiply a signal from a local oscillator 20, and thereby a high frequency input signal is converted to an intermediate frequency signal or a baseband signal. Variable attenuator 14 is variably controlled either to attenuate or not to attenuate, in response to a feedback control signal 22 from the succeeding stage. When an input having large power is received, variable attenuator 14 performs attenuation, so as to prevent low noise amplifier 16 from saturation. When an input having an ordinary level is received, attenuator 14 does not perform attenuation, and the received signal is input to low noise amplifier 16 intact, without being attenuated by variable attenuator 14. Such the prior art is described in Patent document 1.
In the example shown in FIG. 2, a low noise amplifier 16 and an attenuator 15 are provided in parallel, and there is performed a switchover between a case of supplying the reception signal to a mixer 18 via low noise amplifier 16 and a case of supplying to mixer 18 via attenuator 15 by means of a switch SW. The switch SW is controlled to switch over by a feedback control signal 24 fed from the succeeding stage. When an input having large power is received, the switchover is made to the attenuator 15 side, so that attenuator 15 performs attenuation. Meanwhile, when an input of an ordinary level is received, the switchover is made to the low noise amplifier 16 side, so that the reception signal is amplified by low noise amplifier 16. Such the prior art is described in Patent documents 2 and 3.
In the exemplary circuit shown in FIG. 1, a noise factor NF is deteriorated because variable attenuator 14 constituted of an element which becomes a thermal noise source is provided in the preceding stage of low noise amplifier 16. Variable attenuator 14 is configured of, for example, a T-shaped circuit of resistance elements, and for a resistance value R, thermal noise of <v>2=4 kTR (T is temperature) is produced. Therefore, with the provision of the above variable attenuator 14, undesirably the above thermal noise is added to the input signal of low noise amplifier 16. Even when the noise produced by amplifier 16 is low, if the thermal noise is added to the input signal, an overall noise factor (the ratio between the S/N ratio of the input signal and the S/N ratio of the output signal) is deteriorated. Similarly, in the exemplary circuit shown in FIG. 2, a switch SW is provided in the preceding stage of low noise amplifier 16. The above switch SW is constituted of, for example, a MOS transistor, and the transistor is also a generation source of thermal noise. Therefore, in the case of FIG. 2, the noise factor is also deteriorated.
Patent document 1: Japanese Unexamined Patent Publication No. 2002-94408.
Patent document 2: Japanese Unexamined Patent Publication No. 2000-174650.
Patent document 3: Japanese Patent Application Publication No. 2000-508497.